PIPELINING
The Process of fetching the next instruction while the current instruction is being executed is called as “pipelining”. Pipelining is supported by the processor to increase the speed of program execution. Increases throughput. Several operations take place simultaneously, rather than serially in pipelining. The Pipeline has three stages fetch, decode and execute as shown in Fig.
The three stages used in the pipeline are:
(i) Fetch : In this stage the ARM processor fetches the instruction from the memory.
(ii) Decode : In this stage recognizes the instruction that is to be executed.
(iii) Execute 2 In this stage the processor processes the instruction and writes the result back to desired register.
If these three stages of execution are overlapped, we will achieve higher speed of execution. Such pipeline exists in version 7 of ARM processor. Once the pipeline is filled, each instructions require s one cycle to complete execution.
TYPES OF PIPELINE
It is divided into 2 categories:
- Arithmetic Pipeline
- Instruction Pipeline
Arithmetic Pipeline
Arithmetic pipelines are usually found in most of the computers. They are used for floating point operations, multiplication of fixed point numbers etc. For example: The input to the Floating Point Adder pipeline is:
X = A*2^a
Y = B*2^b
Here A and B are mantissas (significant digit of floating point numbers), while a and b are exponents.
The floating point addition and subtraction is done in 4 parts:
- Compare the exponents.
- Align the mantissas.
- Add or subtract mantissas
- Produce the result.
Registers are used for storing the intermediate results between the above operations.
Instruction Pipeline
In this a stream of instructions can be executed by overlapping fetch, decode and execute phases of an instruction cycle. This type of technique is used to increase the throughput of the computer system.
An instruction pipeline reads instruction from the memory while previous instructions are being executed in other segments of the pipeline. Thus we can execute multiple instructions simultaneously. The pipeline will be more efficient if the instruction cycle is divided into segments of equal duration.
Advantages of Pipelining
- The cycle time of the processor is reduced.
- It increases the throughput of the system
- It makes the system reliable.
Disadvantages of Pipelining
- The design of pipelined processor is complex and costly to manufacture.
- The instruction latency is more.
